Newer technology devices, e.g., CMOS devices, which utilize lower operating voltages, are becoming pervasive. Nevertheless, there is still a need to interface with older technology devices. These older devices typically have higher operating ranges, e.g., 4.5 V to 5.5 V which are generally higher than a single transistor can tolerate. In some cases, buffer circuits, designed to tolerate this higher voltage, are used to interface with these older devices. These high voltage tolerant buffer circuits, however, are inappropriate for some newer CMOS devices that are required to use level shifting to interface to the higher voltage levels.
Some of the lower voltage devices contain level shift outputs to interface with devices having higher operating voltages. These level shift outputs use transistors that tolerate five volts. Level shifting can also be accomplished using cascode transistors to maintain acceptable voltage stress levels on the switching transistors. If, however, a cascode transistor is faulty, e.g., has a drain to source short, then the switching transistor will, generally, fail due to voltage stress. Conventional cascode design does not allow a faulty cascode device to be readily detected. Thus, although a conventional cascode configuration will likely perform appropriately during testing, it will fail prematurely in the field due to voltage overstress.